1. source(fet1) 5. darin(fet1,2) 2. gate(fet1) 6. darin(fet1,2) 3. source(fet2) 7. darin(fet1,2) 4. gate(fet2) 8. darin(fet1,2) ? absolute maximum ratings y ta = 25 c note: *1 glass epoxy board: 25.4 mm 25.4 mm 0.8 mm copper foil of the drain portion should have a area of 300 mm 2 or more 1. source(fet1) 5. darin(fet1,2) pd absolute maximum rating non-heat sink: 400 mw 2. gate(fet1) 6. darin(fet1,2) *2 t = 10 s 3. source(fet2) 7. darin(fet1,2) *3 non-heat sink 4. gate(fet2) 8. darin(fet1,2) publication date: october 2012 ver. fed 1 k to -55 pin name resistance value rg fet1 fet2 overall channel temperature range tch 150 id idp v 1.0 12 42 7.0 w 1.2 0.4 a a pd1 *1 storage temperature tstg pd2 *1,*2 pd3 *3 code vgs +150 c - 20 v symbol vds internal connection unit parameter rating panasonic wmini8-f1 jeita sc-115 unit: mm MTMC8E2A0LBF embossed type (thermo-compression sealing): 3 000 pcs / reel (standard) ? built-in gate resistor ? halogen-free / rohs compliant ? features ? low drain-source on resistance:rds(on)typ. = 15 m (vgs = 4.5 v) MTMC8E2A0LBF dual n-channel mosfet for lithium-ion secondary battery protection circuit 1 MTMC8E2A0LBF (eu rohs / ul-94 v-0 / msl:level 1 compliant) ? marking symbol: 4b ? packaging drain-source voltage gate-source voltage drain current peak drain current total power dissipation c 34 5 6 2 1 7 8 rg rg fet 1 fet 2
? electrical characteristics ta = 25 c 3 c fet1,fet2 note: measuring methods are based on japanese industrial standard jis c 7030 measuring methods for transistors. *1 see test circuit. ver. fed m turn-off delay time *1 td(off) fall time *1 tf 3.0 input capacitance ciss crss turn-on delay time *1 td(on) 2.0 4.0 rise time *1 tr 0.33 0.70 vds = 10 v, vgs = 0 v, f = 1 mhz output capacitance coss vdd = 10 v, vgs = 0 to 4 v, id = 1.0 a 2 90 reverse transfer capacitance s MTMC8E2A0LBF 1.30 18 id = 2.0 a, vgs = 3.7 v 25 id = 1.0 a, vds = -10 v 10 a v v 1.0 a 20 vgs = 8.0 v, vds = 0 v zero gate voltage drain current idss vds = 20 v, vgs = 0 v gate-source leakage current vdss id = 1.0 ma, vgs = 0 v igss unit parameter min typ max symbol conditions drain-source breakdown voltage rds(on)1 rds(on)2 drain-source on-state resistance gate-source threshold voltage vth 33 id = 1.0 ma, vds = 10 v 0.40 0.85 15 21 id = 2.0 a, vgs = 4.5 v vdd = 10 v, vgs = 4 to 0 v, id = 1.0 a forward transfer admittance |yfs| s s pf 1 450 100 id = 2.0 a, vgs = 2.5 v 22 rds(on)3
*1 test circuit ver. fed MTMC8E2A0LBF 3 vin vout 10 % 90 % td(on) 10 % 90 % tr td(off) tf vdd = 10 v vout vin id = 1.0 a rl = 10 50 vin 0 v 4 v pw = 10 s d.c. 1 % d s g rg
ver. fed MTMC8E2A0LBF 4 id - vds id - vgs vds - vgs rds(on) - id 0 1 2 3 4 5 6 0 0.1 0.2 0.3 drain-source voltage vds (v) drain current id (a) vgs = 4.5 v 3.7 v 2.5 v 1.5 v 2.0 v 0 0.05 0.1 0.15 0.2 0.25 0.3 02468 gate-source voltage vgs (v) drain-source voltage vds (v) 2.0a id = 4.0a 1.0a 0 2 4 6 8 10 0 0.5 1 1.5 2 gate-source voltage vgs (v) drain current id (a) 25 c ta = 85 c -30 c 1 10 100 110 drain current id (a) drain-source on-state resistance rds(on) (m ) vgs = 4.5 v 3.7 v 2.5 v
ver. fed rth -tsw MTMC8E2A0LBF safe operating area 5 vth - ta rds(on) - ta pd - ta 0.01 0.1 1 10 100 1000 0.01 0.1 1 10 100 drain-source voltage vds (v) drain current id (a) idp = 42 a operation in this area is limited by rds(on) ta = 25 c, glass epoxy board (25.4 25.4 0.8 mm)coated with copper foil, which has more than 300 mm 2 . 100 ms 1 s dc 1 ms 10 ms 1 10 100 1000 0.01 0.1 1 10 100 1000 pulse width tsw (s) thermal resistance rth ( c/w) 0 5 10 15 20 25 30 35 -50 0 50 100 150 temperature ta ( c) drain-source on-state resistance rds(on) (m ) 3.7 v vgs = 4.5 v 2.5v 0 0.5 1 1.5 -50 0 50 100 150 temperature ta ( c) gate-source threshold voltage vth (v) 0 0.5 1 1.5 2 0 50 100 150 temperature ta ( c) total power dissipation pd (w) measuring on ceramic substrate at 25.4 mm 25.4 mm 0.8 mm. non-heat sink
ver. fed MTMC8E2A0LBF 6 unit: mm wmini8-f1 ? land pattern (reference) (unit: mm)
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